SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 11

• Manufacturer Part Number: SST34WA3283
• Description: 32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
• Manufacturer: Silicon Storage Technology, Inc.

32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
programming acceleration feature, on the 2nd program
cycle after the programming acceleration command is
written, WP# must be held to V
WP# pin is held to V
disabled. WP# should be in pull-up state if it is not used.
Software Block Locking
To prevent accidental data programming or erasing, the
Block Lock command is used. All 32 KWord main blocks
and 8KW parameter blocks can be independently locked.
A locked block can not be able to be programmed or
erased. After Power-Up, all blocks are locked.
Changing the state-of-lock for a block is done by using the
Block Lock/Unlock Command (60H). See Table 20.
In the third cycle the address must point to the Block to be
locked/unlocked. The status of the A
specify if the block must be locked (A
(A
Blocks in the same Bank can be modified.
Reading the state-of-lock for each block is achieved using
the Read Block Locking Register command with the
TABLE 7: Block Locking Register Data
Note: The default read status of all blocks upon power-up is write-locked (“01H”). After power-up, when the power supply (
©2007 Silicon Storage Technology, Inc.
6
Reserved Bits BLR[15:1]
=V
register is alterable.
IH
000000000000000
000000000000000
). After the third cycle, the state-of-lock of additional
IL
the Chip Erase Operation is
IL
Write-Lock bit: BLR[0]
on the 2nd cycle. If the
6
6
=V
Address bit will
IL
) or unlocked
0
1
11
address parameter that is within the block address space
For details, see Table 20. This command will read the Block
Locking Register. If the Block Locking Register is 0000H
the Block is Unlocked, if it is 0001H the Block is Locked.
The Read Block Locking Register command can be written
to a bank which is either in Read Mode or in Erase-
Suspend-Read mode. Only one bank at a time can be
switched to Read Block Locking Register mode. To return
the selected bank to Read Mode, or Erase-Suspend Read
Mode, the Software ID Exit/Block Locking Exit Command
must be issued by the system. see Table 20.
WP# is internally ORed with the Block Locking register.
When WP# is low, the blocks are hardware write protected
regardless of the state of the Write-Lock bit for the
corresponding Block Locking registers. Clearing the Write-
Protect bit in any register when WP# is low will have no
functional effect, even though the register may indicate that
the block is no longer locked.
After the third cycle, the state-of-lock for additional Blocks in
the same Bank can be modified.
Hex Code
0000H
0001H
Write Locked (Default State
Advance Information
at Power-Up)
Lock Status
Full Access
S71358-01-000
V
DD
) is valid, the
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