SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 2

• Manufacturer Part Number: SST34WA3283
• Description: 32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
• Manufacturer: Silicon Storage Technology, Inc.

Advance Information
DEVICE OPERATION
The SST34WA32A3/32A4/3283/3284 control operation of
either the flash or the PSRAM memory bank using BEF#
and BES#.
When BEF# is low, the flash bank is activated for Read,
Program, or Erase operation. When BES# is low, the
PSRAM is activated for Read and Write operation.
Do not assert BEF# and BES# low at the same time. If all
bank enable signals are asserted, bus contention will result
and the device may suffer permanent damage.
Flash Memory
Various commands are used to initiate the memory
operation functions of the device. Commands are written to
the
sequences. See Table 20 on page 30 for the command
sequence for each function.
The flash memory of SST34WA32A3/32A4/3283/3284 has
an Auto Low Power mode which puts the device in a “near
stand-by” mode after data has been accessed with a valid
Read operation. This reduces the flash active read current.
The Auto Low Power mode reduces the current
consumption of the flash memory to stand-by level. The
flash memory exits the Auto Low Power mode with any
address or flash control signal transition; therefore, there is
no access time penalty for Read cycles.
.
TABLE 1: Critical Parameters
©2007 Silicon Storage Technology, Inc.
Critical Parameters
Max Random Address Access Time
Max Synchronous Access Time (54 MHz)
Max Synchronous Access Time (66 MHz)
device
using
standard
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
microprocessor
Values Units
13.5
11.5
70
T1.0 1358
write
ns
ns
ns
2
Concurrent Read/Write Operation
The multi-bank architecture of the flash memory of this
device allows zero latency Concurrent Read/Write
operation whereby the user can read from one bank of the
flash while programming or erasing in another bank. With
this operation a user can read system code in one bank
while updating data in another bank. A unique feature of
the SST34WA32A3/32A4/3283/3284 is ability to Read
during an Erase-Suspend even while Programming in
another bank. This feature is designed to respond to
interrupt requests during concurrent operation. See Table
2, Current Read/Write State.
TABLE 2: Concurrent Read/Write State
Note: For the purposes of this table, “Write” means to perform Sec-
Current Operation in One
Bank
Read
Read
Write
Write
No Operation
No Operation
tor/Block or Word-Program operations as applicable to the
appropriate bank.
Possible Operation in Any
Other Bank
No Operation
Write
Read
No Operation
Read
Write
S71358-01-000
T2.0 1358
11/07