SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 66

• Manufacturer Part Number: SST34WA3283
• Description: 32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
• Manufacturer: Silicon Storage Technology, Inc.

Advance Information
©2007 Silicon Storage Technology, Inc.
FIGURE 38: PSRAM Burst Read Followed by Asynchronous Write Using AVD#
A/DQ
Notes: 1. Non-default BCR settings for burst READ followed by asynchronous WRITE using AVD#: Fixed latency; latency code
LBS#/UBS#
A
15
max
–A/DQ
2. When transitioning between asynchronous and variable-latency burst operations, BES# must go HIGH. BES# can stay
AVD#
BES#
WAIT
–A
two (three clocks); WAIT active LOW; WAIT asserted during delay.
LOW when transitioning from fixed-latency burst READs; asynchronous operation begins at the falling edge of AVD#.
A refresh opportunity must be provided every T
conditions: a) clocked BES# HIGH, or b) BES# HIGH for longer than 15ns.
WE#
OE#
CLK
16
0
VIH
VIH
T
High-Z
High-Z
BESS
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
T
T
SPS
SPS
READ Burst Identified
Valid Address
T
Valid Address
SPS
T
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
(WE# = HIGH)
T
SPS
BEWS
T
T
T
T
HDS
HDS
HDS
OLZS
T
BACCS
T
OES
BEPS
T
T
VPHS
CWS
T
66
T
. A refresh opportunity is satisfied by either of the following two
HDS
CLK
T
Valid Output
T
OHZS
BHZS
T
Note 2
BPHS
T
BDHS
High-Z
T
VPLS
T
AASS
Valid Address
Valid Address
T
T
T
ASTS
ASTS
BEWS
T
T
AAHS
T
T
BWS
VWS
T
BYWS
T
AWS
WPLS
T
T
WPHS
BHZS
T
DSS
Valid Input
S71358-01-000
1358 F39.0
T
DHS
11/07