SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 65

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SST34WA3283

Manufacturer Part Number
SST34WA3283
Description
32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
Manufacturer
Silicon Storage Technology, Inc.
Datasheet
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
©2007 Silicon Storage Technology, Inc.
FIGURE 37: PSRAM Asynchronous Write Followed by Burst Read
A/DQ
Notes: 1. Non-default BCR settings for asynchronous WRITE followed by burst READ: Fixed or variable
LBS#/UBS#
A
15
max
–A/DQ
AVD#
BES#
2. When transitioning between asynchronous and variable-latency burst operations, BES# must go
WAIT
–A
WE#
OE#
CLK
latency; latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
HIGH. BES# can stay LOW when transitioning to fixed-latency burst READs. A refresh opportunity
must be provided every T
conditions: a) clocked BES# HIGH, or b) BES# HIGH for longer than 15ns.
16
0
VIL
Hi-Z
T
T
AASS
T
Address
VPLS
Valid
Valid Address
BVS
T
T
T
VPHS
BWS
T
WCS
WPLS
T
T
T
T
ASTS
AAHS
BYWS
ASTS
Data
BEPS
T
T
WCS
Valid Address
T
DSS
T
Valid
. A refresh opportunity is satisfied by either of the following two
AWS
Add
T
VWS
T
WCS
DHS
T
Data
WPHS
T
SPS
T
65
SPS
Note 2
T
WRS
Address
Address
Valid
Valid
T
BPHS
T
T
CLK
T
BACCS
T
T
SPS
BESS
SPS
T
High-Z
T
T
HDS
BEWS
HDS
Output
Valid
T
OES
Output
Valid
T
BDHS
Output
Valid
Output
Valid
Advance Information
1358 F38.0
T
High-Z
HDS
T
S71358-01-000
OHZS
11/07

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