s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 118

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports (PORTS)
12.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a 1 to a
DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Figure 12-6
When DDRBx is a 1, reading address $0001 reads the PTBx data latch. When DDRBx is a 0, reading
address $0001 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit.
118
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
shows the port B I/O logic.
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
DDRB
Address:
Bit
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
0
1
Reset:
Read:
Write:
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
DDRB7
PTB
$0005
Bit
Bit 7
X
X
0
Figure 12-5. Data Direction Register B (DDRB)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Table 12-2
Input, Hi-Z
DDRB6
I/O Pin
Output
Mode
6
0
Table 12-2. Port B Pin Functions
RESET
Figure 12-6. Port B I/O Circuit
summarizes the operation of the port B pins.
DDRB5
5
0
Accesses to DDRB
NOTE
DDRB4
Read/Write
DDRBx
DDRB[7:0]
DDRB[7:0]
PTBx
4
0
DDRB3
3
0
DDRB2
PTB[7:0]
2
0
Read
Pin
Accesses to PTB
DDRB1
1
0
PTB[7:0]
PTB[7:0]
Freescale Semiconductor
Write
DDRB0
Bit 0
PTBx
0
(1)

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