s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 207

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
17.8.5 TIMA Channel Registers
These read/write registers contain the captured TIMA counter value of the input capture function or the
output compare value of the output compare function. The state of the TIMA channel registers after reset
is unknown.
In input capture mode (MSxB–MSxA = 0:0), reading the high byte of the TIMA channel x registers
(TACHxH) inhibits input captures until the low byte (TACHxL) is read.
In output compare mode (MSxB–MSxA ≠ 0:0), writing to the high byte of the TIMA channel x registers
(TACHxH) inhibits output compares and the CHxF bit until the low byte (TACHxL) is written.
Freescale Semiconductor
Register Name and Address
Register Name and Address
Register Name and Address
Register Name and Address
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 17-9. TIMA Channel Registers (TACH0H/L–TACH1H/L)
BIT 15
BIT 15
BIT 7
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
BIT 14
BIT 14
BIT 6
BIT 6
6
6
6
6
TACH0H — $0026
TACH0L — $0027
TACH1H — $0029
TACH1L — $002A
BIT 13
BIT 13
BIT 5
BIT 5
5
5
5
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
BIT 12
BIT 12
BIT 4
BIT 4
4
4
4
4
BIT 11
BIT 11
BIT 3
BIT 3
3
3
3
3
BIT 10
BIT 10
BIT 2
BIT 2
2
2
2
2
BIT 9
BIT 1
BIT 9
BIT 1
1
1
1
1
BIT 0
BIT 8
BIT 0
BIT 8
Bit 0
Bit 0
Bit 0
Bit 0
I/O Registers
207

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