s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 167

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

SBSW — SIM Break STOP/WAIT
14.7.2 SIM Reset Status Register
This register contains seven bits that show the source of the last reset. The status register will clear
automatically after reading it. A power-on reset sets the POR bit and clears all other bits in the register.
POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
MENRST — Forced Monitor Mode Entry Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
Freescale Semiconductor
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin RST
0 = POR or read of SPSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset was caused by the MENRST circuit
0 = POR or read of SRSR
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
Address:
Read:
Write:
POR:
$FE01
POR
Bit 7
1
Figure 14-17. SIM Reset Status Register (SRSR)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Unimplemented
PIN
6
0
COP
5
0
ILOP
4
0
ILAD
3
0
MENRST
2
0
LVI
1
0
Bit 0
0
0
SIM Registers
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