s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 203

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

17.8.2 TIMA Counter Registers
The two read-only TIMA counter registers contain the high and low bytes of the value in the TIMA counter.
Reading the high byte (TACNTH) latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL is read. Reset clears the TIMA
counter registers. Setting the TIMA reset bit (TRST) also clears the TIMA counter registers.
17.8.3 TIMA Counter Modulo Registers
The read/write TIMA modulo registers contain the modulo value for the TIMA counter. When the TIMA
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIMA counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TMODL) is written. Reset sets the TIMA counter modulo registers.
Freescale Semiconductor
Register Name and Address
Register Name and Address
Register Name and Address
Register Name and Address
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL by
reading TACNTL before exiting the break interrupt. Otherwise, TACNTL
retains the value latched during the break.
Reset the TIMA counter before writing to the TIMA counter modulo registers.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 17-6. TIMA Counter Modulo Registers (TMODH and TMODL)
Figure 17-5. TIMA Counter Registers (TACNTH and TACNTL)
BIT 15
BIT 15
BIT 7
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
R
R
R
0
0
1
1
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
BIT 14
BIT 14
BIT 6
BIT 6
R
R
6
0
6
0
6
1
6
1
TACNTH — $0021
TACNTL — $0022
TAMODH — $0023
TAMODL — $0024
BIT 13
BIT 13
BIT 5
BIT 5
R
R
5
0
5
0
5
1
5
1
NOTE
NOTE
BIT 12
BIT 12
BIT 4
BIT 4
R
R
4
0
4
0
4
1
4
1
BIT 11
BIT 11
BIT 3
BIT 3
R
R
3
0
3
0
3
1
3
1
BIT 10
BIT 10
BIT 2
BIT 2
R
R
2
0
2
0
2
1
2
1
BIT 9
BIT 1
BIT 9
BIT 1
R
R
1
0
1
0
1
1
1
1
BIT 0
BIT 8
BIT 8
BIT 0
Bit 0
Bit 0
Bit 0
Bit 0
R
R
0
0
1
1
I/O Registers
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