s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 89

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

start
loop
8.4.2 Enabling the Clock Monitor
Many applications require the clock monitor to determine if one of the clock sources has become inactive,
so the other can be used to recover from a potentially dangerous situation. Using the clock monitor
requires both clocks to be active (ECGON and ICGON both set). To enable the clock monitor, both clocks
also must be stable (ECGS and ICGS both set). This is to prevent the use of the clock monitor when a
clock is first turned on and potentially unstable.
Enabling the clock monitor and clock monitor interrupts requires a flow similar to this:
These events must happen in sequence. A short assembly code example of how to employ this flow is
shown in
any particular assembler.
start
loop
Freescale Semiconductor
•
•
•
•
•
Enable the alternate clock source
Wait for both clock sources to be stable
Switch to the desired clock source if necessary
Enable the clock monitor
Enable clock monitor interrupts
lda
**
sta
cmpa
bne
lda
**
sta
brset
cmpa
bne
Figure
8-10. This code is for illustrative purposes only and does not represent valid syntax for
#$13
**
icgcr
icgcr
loop
#$AF
**
icgcr
6,ICGCR,error ;Verify CMF is not set
icgcr
loop
Figure 8-10. Code Example for Enabling the Clock Monitor
Figure 8-9. Code Example for Switching Clock Sources
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
;Clock Switching Code Example
;This code switches from Internal to External clock
;Clock Monitor and interrupts are not enabled
;Mask for CS, ECGON, ECGS
; If switching from External to Internal, mask is $0C.
;Other code here, such as writing the COP, since ECGS may
; take some time to set
;Try to set CS, ECGON and clear ICGON. ICGON will not
; clear until CS is set, and CS will not set until
; ECGON and ECGS are set.
;Check to see if ECGS set, then CS set, then ICGON clear
;Keep looping until ICGON is clear.
;Clock Monitor Enabling Code Example
;This code turns on both clocks, selects the desired
; one, then turns on the Clock Monitor and Interrupts
;Mask for CMIE, CMON, ICGON, ICGS, ECGON, ECGS
; If Internal Clock desired, mask is $AF
; If External Clock desired, mask is $BF
; If interrupts not desired mask is $2F int; $3F ext
;Other code here, such as writing the COP, since ECGS
; and ICGS may take some time to set.
;Try to set CMIE. CMIE wont set until CMON set; CMON
; won’t set until ICGON, ICGS, ECGON, ECGS set.
;Check if ECGS set, then CMON set, then CMIE set
;Keep looping until CMIE is set.
Usage Notes
89