s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 148

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Enhanced Serial Communications Interface (ESCI) Module
PDS2–PDS0 — Prescaler Divisor Select Bits
PSSB4–PSSB0 — Clock Insertion Select Bits
Use the following formula to calculate the ESCI baud rate:
where:
Table 13-11
148
These read/write bits select the prescaler divisor as shown in
These read/write bits select the number of clocks inserted in each 32 output cycle frame to achieve
more timing resolution on the average prescaler frequency as shown in
PSSB4–PSSB0.
Frequency of the SCI clock source = f
BPD = Baud rate register prescaler divisor
BD = Baud rate divisor
PD = Prescaler divisor
PDFA = Prescaler divisor fine adjust
ESCIBDSRC in the CONFIG2 register)
shows the ESCI baud rates that can be generated with a 4.9152-MHz clock frequency.
The setting of ‘000’ will bypass not only this prescaler but also the Prescaler
Divisor Fine Adjust (PDFA). It is not recommended to bypass the prescaler
while ENSCI is set, because the switching is not glitch free.
Baud rate =
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
PDS[2:1:0]
Table 13-9. ESCI Prescaler Division Ratio
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Frequency of the SCI clock source
64 x BPD x BD x (PD + PDFA)
Bus
or CGMXCLK (selected by
NOTE
Prescaler Divisor (PD)
Bypass this prescaler
Table
2
3
4
5
6
7
8
13-9. Reset clears PDS2–PDS0.
Table
13-10. Reset clears
Freescale Semiconductor

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