mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 38

• Manufacturer Part Number: mt48lc1m16a1
• Description: Synchronous Dram
• Manufacturer: Micron Semiconductor Products

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. DQM represents DQML and DQMH. DQML controls the lower byte, and DQMH controls the upper byte.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
SYMBOL* MIN
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
COMMAND
ADDRESS
DQM
CKE
CLK
DQ
1
2.5
2.5
20
1
2
6
8
High-Z
Precharge all
active banks.
t CKS
t CMS
-6
t
AS
PRECHARGE
MAX
BANK(S)
T0
t CMH
t CKH
t
AH
t CK
MIN
2.75
2.75
10
25
1
2
7
-7
t RP
MAX
T1
NOP
t CH
MIN
13
25
1
2
3
3
8
-8A
refresh mode.
t CKS
t CL
Enter self
MAX
REFRESH
SELF REFRESH MODE
CLK stable prior to exiting
AUTO
T2
self refresh mode.
UNITS
> t RAS
ns
ns
ns
ns
ns
ns
ns
38
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SYMBOL* MIN
t
t
t
t
t
t
t
CKH
CKS
CMH
CMS
RAS
RP
XSR
(Restart refresh time base.)
Exit self refresh mode.
Tn + 1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
42
18
80
1
2
1
2
NOP
t XSR
-6
120,000
(
(
(
(
(
(
(
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(
)
)
)
)
)
(
(
(
MAX
)
)
)
)
)
(
(
(
(
(
(
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(
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(
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)
)
)
t CKS
To + 1
MIN
42
21
80
1
2
1
2
-7
120,000
MAX
To + 2
16Mb: x16
REFRESH
AUTO
MIN
IT SDRAM
48
24
80
1
2
1
2
©1999, Micron Technology, Inc.
DON’T CARE
UNDEFINED
-8A
120,000
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns