mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 44

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mt48lc1m16a1

Manufacturer Part Number
mt48lc1m16a1
Description
Synchronous Dram
Manufacturer
Micron Semiconductor Products
Datasheet

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TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, and the CAS latency = 2.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
COMMAND
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
A0-A9
DQM
CLK
CKE
A10
DQ
BA
3
2. A8 and A9 = “Don’t Care.”
3. DQM represents DQML and DQMH. DQML controls the lower byte, and DQMH controls the upper byte.
t CMS
t CKS
t AS
t AS
t AS
2.5
2.5
20
ACTIVE
1
2
6
8
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
-6
MAX
5.5
t RCD
18
8
t CK
MIN
2.75
2.75
T1
NOP
10
25
1
2
7
-7
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
MAX
5.5
8.5
22
t CMS
t CL
COLUMN m
(A0 - A7)
T2
READ
BANK
MIN
t CMH
13
25
1
2
3
3
8
t CH
3
READ – DQM OPERATION
CAS Latency
-8A
MAX
22
6
9
T3
NOP
t
UNITS
LZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t AC
44
T4
NOP
t OH
D
t HZ
OUT
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
t
CKH
CKS
CMH
CMS
HZ (3)
HZ (2)
HZ (1)
LZ
OH
RCD
m
T5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
t
LZ
t AC
1.5
18
1
2
1
2
1
1
-6
MAX
5.5
18
6
T6
NOP
D
OUT
t OH
t AC
MIN
1.5
m + 2
20
1
2
1
2
1
-7
MAX
5.5
8.5
22
T7
NOP
D
OUT
t OH
t HZ
16Mb: x16
m + 3
MIN
IT SDRAM
1.5
24
1
2
1
2
1
©1999, Micron Technology, Inc.
-8A
MAX
T8
NOP
DON’T CARE
UNDEFINED
22
6
9
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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