mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 46

• Manufacturer Part Number: mt48lc1m16a1
• Description: Synchronous Dram
• Manufacturer: Micron Semiconductor Products

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, and the WRITE burst is followed by “manual” PRECHARGE.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
COMMAND
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
A0-A9
DQM
CLK
CKE
A10
DQ
BA
3
2. A8 and A9 = “Don’t Care.”
3. DQM represents DQML and DQMH. DQML controls the lower byte, and DQMH controls the upper byte.
4. Faster frequencies will require two clocks (when
t CMS
t CKS
t AS
t AS
t AS
2.5
2.5
20
ACTIVE
1
2
6
8
1
2
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
-6
MAX
t RCD
t RAS
t RC
t CK
MIN
T1
2.75
2.75
NOP
10
25
1
2
7
1
2
-7
DISABLE AUTO PRECHARGE
MAX
t CMS
t CL
WRITE – WITHOUT AUTO PRECHARGE
t DS
COLUMN
(A0 - A7)
WRITE
BANK
T2
D
IN
MIN
t CMH
13
25
t CH
t DH
m
1
2
3
3
8
1
2
m
2
-8A
MAX
t DS
D
IN
T3
NOP
m + 1
UNITS
t DH
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
WR >
t DS
46
D
IN
T4
t
NOP
CK).
m + 2
t DH
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
CMH
CMS
DH
DS
RAS
RC
RCD
RP
WR
t DS
D
IN
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
m + 3
t DH
42
60
18
18
10
1
2
1
2
t WR
-6
120,000
BANK 0 and 1
MAX
PRECHARGE
BANK 0 or 1
4
BANK(S)
T6
1
MIN
42
70
20
21
10
1
2
1
2
-7
120,000
MAX
NOP
t RP
T7
16Mb: x16
MIN
IT SDRAM
48
80
24
24
10
1
2
1
2
©1999, Micron Technology, Inc.
-8A
ACTIVE
ROW
120,000
ROW
BANK
T8
MAX
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns