mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 9

• Manufacturer Part Number: mt48lc1m16a1
• Description: Synchronous Dram
• Manufacturer: Micron Semiconductor Products

COMMANDS
commands. This is followed by a written description of
each command. Three additional Truth Tables appear
TRUTH TABLE 1 – COMMANDS AND DQM OPERATION
(Notes: 1)
NOTE: 1. CKE is HIGH for all commands shown except SELF REFRESH.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
NAME (FUNCTION)
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column and start READ burst)
WRITE (Select bank and column and
start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or
SELF REFRESH (Enter self refresh mode)
LOAD MODE REGISTER
Write Enable/Output Enable
Write Inhibit/Output High-Z
Truth Table 1 provides a quick reference of available
2. A0-A10 and BA define the op-code written to the Mode Register.
3. A0-A10 provide row address, and BA determines which bank is made active.
4. A0-A7 provide column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10 LOW disables
5. For A10 LOW, BA determines which bank is being precharged; for A10 HIGH, all banks are precharged and BA is a
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
the auto precharge feature; BA determines which bank is being read from or written to.
“Don’t Care.”
9
CS# RAS# CAS# WE# DQM ADDR
following the Operation section; these tables provide
current state/next state information.
H
L
L
L
L
L
L
L
–
–
L
H
H
H
H
X
L
L
L
L
–
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
H
H
H
H
X
L
L
L
L
–
–
H
H
H
H
X
L
L
L
L
–
–
L/H
L/H
X
H
X
X
X
X
X
X
L
8
8
Bank/Row
Bank/Col
Bank/Col Valid
Op-Code
Code
X
X
X
X
–
–
16Mb: x16
IT SDRAM
©1999, Micron Technology, Inc.
High-Z
Active
Active
DQs NOTES
X
X
X
X
X
X
X
6, 7
3
4
4
5
2
8
8