pi7c8150b Pericom Semiconductor Corporation, pi7c8150b Datasheet - Page 32

• Manufacturer Part Number: pi7c8150b
• Description: Asynchronous 2-port Pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

06-0044
Table 3-6. Device Number to IDSEL S_AD Pin Mapping
When PI7C8150B translates the Type 1 transaction to a Type 0 transaction on the
secondary interface, it performs the following translations to the address:
PI7C8150B asserts a unique address line based on the device number. These address lines
may be used as secondary bus IDSEL signals. The mapping of the address lines depends on
the device number in the Type 1 address bits P_AD[15:11]. presents the mapping that
PI7C8150B uses.
PI7C8150B can assert up to 9 unique address lines to be used as IDSEL signals for
up to 9 devices on the secondary bus, for device numbers ranging from 0 through 8.
Because of electrical loading constraints of the PCI bus, more than 9 IDSEL signals should
not be necessary. However, if device numbers greater than 9 are desired, some external
method of generating IDSEL lines must be used, and no upper address bits are then
asserted. The configuration transaction is still translated and passed from the primary bus to
the secondary bus. If no IDSEL pin is asserted to a secondary device, the transaction ends
in a master abort.
Device Number
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
10h – 1Eh
1Fh
The lowest two address bits on P_AD[1:0] are 01b.
The bus number in address field P_AD[23:16] is equal to the value in the secondary
bus number register in configuration space.
The bus command on P_CBE[3:0] is a configuration read or configuration write
transaction.
Sets the lowest two address bits on S_AD[1:0].
Decodes the device number and drives the bit pattern specified in Table 3-6 on
S_AD[31:16] for the purpose of asserting the device’s IDSEL signal.
Sets S_AD[15:11] to 0.
Leaves unchanged the function number and register number fields.
P_AD[15:11]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000 – 11110
11111
Page 32 of 108
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
Secondary IDSEL S_AD[31:16]
0000 0000 0000 0001
0000 0000 0000 0010
0000 0000 0000 0100
0000 0000 0000 1000
0000 0000 0001 0000
0000 0000 0010 0000
0000 0000 0100 0000
0000 0000 1000 0000
0000 0001 0000 0000
0000 0010 0000 0000
0000 0100 0000 0000
0000 1000 0000 0000
0001 0000 0000 0000
0010 0000 0000 0000
0100 0000 0000 0000
1000 0000 0000 0000
0000 0000 0000 0000
Generate special cycle (P_AD[7:2] > 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
APRIL 2006 – Revision 2.02
PI7C8150B
S_AD
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
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