pi7c8150b Pericom Semiconductor Corporation, pi7c8150b Datasheet - Page 66

• Manufacturer Part Number: pi7c8150b
• Description: Asynchronous 2-port Pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

06-0044
9
9.1
9.2
9.3
the secondary bus only when the reconfigured grant signal, S_REQ_L[0], is asserted and
the secondary bus is idle.
CLOCKS
This chapter provides information about the clocks.
PRIMARY CLOCK INPUTS
PI7C8150B implements a primary clock input for the PCI interface. The primary interface
is synchronized to the primary clock input, P_CLK, and the secondary interface is
synchronized to the secondary clock. In synchronous mode, the secondary clock is derived
internally from the primary clock, P_CLK. PI7C8150B operates at a maximum frequency
of 66 MHz (33MHz for PI7C8150B-33).
SECONDARY CLOCK OUTPUTS
PI7C8150B has 10 secondary clock outputs, S_CLKOUT[9:0] that can be used as clock
inputs for up to nine external secondary bus devices. In synchronous mode, the
S_CLKOUT[9:0] outputs are derived from P_CLK. The secondary clock edges are delayed
from P_CLK edges by a minimum of 0ns. This is the rule for using secondary clocks:
Each secondary clock output is limited to no more than one load.
ASYNCHRONOUS MODE
In asynchronous mode, the PI7C8150B can be run in the following frequency
configuration:
PI7C8150B-33 can be run in the following frequency configuration:
To set asynchronous mode support, MS0 and MS1 must be configured accordingly:
When MS0 and MS1 are pulled to HIGH during the deassertion of P_RST, PI7C8150B
will go into asynchronous mode. The secondary clock outputs will then be derived from
MS0
25MHz to 66MHz
25MHz to 33MHz
Primary (MHz)
Primary (MHz)
0
0
1
1
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ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
MS1
0
1
0
1
Secondary (MHz)
Secondary (MHz)
25MHz to 66MHz
25MHz to 33MHz
Reserved for future use
Reserved for future use
Synchronous Mode
Asynchronous Mode
Description
APRIL 2006 – Revision 2.02
PI7C8150B