pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 12

• Manufacturer Part Number: pcf8536
• Description: Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8536
Product data sheet
8.1.4.4 Display enable
8.1.5 Command: oscillator-control
The display enable bit (E) is used to enable and disable the display. When the display is
disabled, all LCD outputs go to V
voltage can be induced on the LCD outputs as it may lead to unwanted displays of
segments.
Recommended start-up sequences are found in
Remarks:
The oscillator-control command switches between internal and external oscillator and
enables or disables the pin OSCCLK. It is also used to define what the external frequency
will be.
Table 10.
[1]
The bits OSC, COE, and EFR control the source and frequency of the clock used to
generate the LCD and PWM signals (see
Table
Bit
7 to 3
2
1
0
•
•
•
A clock signal must always be supplied to the device when the display is active.
Removing the clock may freeze the LCD in a DC state, which is not suitable for the
liquid crystal. It is recommended to disable the display first and afterwards to remove
the clock signal.
The state of display enable has no effect on the GPO outputs.
Display enable is not synchronized to an LCD frame boundary. Therefore using this
function to flash a display for prolonged periods is not recommended due to the
possible build-up of DC voltages on the display.
Default value.
11.
Symbol
-
EFR
COE
OSC
Oscillator-control - oscillator control command bit description
All information provided in this document is subject to legal disclaimers.
Universal LCD low multiplex driver with 6 channel PWM generator
Rev. 1 — 6 October 2011
Value
00011
0
1
0
1
0
1
[1]
[1]
[1]
SS
. This function is implemented to ensure that no
Figure
Description
fixed value
external clock frequency applied on pin
OSCCLK
clock output enable for pin OSCCLK
oscillator source
9.6 kHz
230 kHz
clock signal not available on pin OSCCLK;
pin OSCCLK is in 3-state
clock signal available on pin OSCCLK
internal oscillator running
external oscillator used;
pin OSCCLK becomes an input;
used in combination with EFR to determine
input frequency
Section 8.2.3
7). Valid combinations are shown in
PCF8536
© NXP B.V. 2011. All rights reserved.
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