pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 41

• Manufacturer Part Number: pcf8536
• Description: Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8536
Product data sheet
8.11 GPO output
The PCF8536 contains six independently configured GPO pins (GP0 to GP5). These
outputs, when enabled, will replace the function of the corresponding LCD segment
outputs.
Each GPO output can supply either a logic 1, a logic 0, or a PWM signal. The PWM signal
can be used to control the brightness of an LED.
The PWM generator has 128 possible levels allowing for an output with a variable duty
cycle between 0 % and 99.7 %. 100 % can only be achieved by a static 1 output.
The period of the PWM frame frequency described in
128 time slots. The value in the PWM register determines for how many of these time
slots the PWM output is at logic 1.
Table 33.
PWM duty cycle may be calculated by:
DutyCycle
PWM register value
0
1
2
:
126
127
Fig 26. PWM register filling
Display RAM rows/
backplane outputs
(BP)
Rows
PWM generator
=
PWMvalue
---------------------------- - 100
All information provided in this document is subject to legal disclaimers.
0
1
2
3
4
5
6
7
128
Universal LCD low multiplex driver with 6 channel PWM generator
b7
b6
b5
b4
b3
b2
b1
b0
0
Percentage of
ON time (%)
0
0.78
1.56
:
98.4
99.2
Rev. 1 — 6 October 2011
1
2

Display RAM columns/segment outputs (S)
3
4
5
6
Columns
7
Time slots at 1
0
1
2
:
126
127
35 36 37 38 39
Section 8.1.10
MSB
b7
Time slots at 0
128
127
126
:
2
1
b6
Transmitted data byte
is divided into
PCF8536
b5
© NXP B.V. 2011. All rights reserved.
b4
b3
b2
013aaa460
b1
41 of 74
LSB
b0
(9)