pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 37

• Manufacturer Part Number: pcf8536
• Description: Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8536
Product data sheet
8.9.2 RAM filling in 1:4 multiplex drive mode
In the 1:4 multiplex drive mode the RAM is organized in four rows and 44 columns. The
eight transmitted data bits are placed in two successive display RAM columns of four rows
(see
PCF8536. After the last byte sent, the data pointer must be reset before the next RAM
content update. Additional data bytes sent and any data bits that spill over the RAM will be
discarded.
Depending on the start address of the data pointer, there is the possibility for a boundary
condition. This will occur when more data bits are sent than fit into the remaining RAM.
The additional data bits are discarded. See
Fig 21. Display RAM filling order in 1:4 multiplex drive mode
Fig 22. Boundary condition in 1:4 multiplex drive mode
backplane outputs
backplane outputs
Display RAM
Figure
Display RAM
bits (rows)/
bits (rows)/
(BP)
(BP)
Rows
Rows
21). In order to fill the whole four RAM rows, 22 bytes need to be sent to the
All information provided in this document is subject to legal disclaimers.
0
1
2
3
0
1
2
3
Universal LCD low multiplex driver with 6 channel PWM generator
b7
b6
b5
b4
0
0
Display RAM addresses (columns)/segment outputs (S)
Display RAM addresses (columns)/segment outputs (S)
b3
b2
b1
b0
Rev. 1 — 6 October 2011
1
1
2
2
3
3
4
4
5
5
6
Columns
6
Columns
7
7
Figure
39 40 41 42 43
39 40 41 42 43
22.
b7
b6
b5
b4
MSB
MSB
b7
b7
b6
b6
Transmitted data byte
Transmitted data byte
b5
b5
PCF8536
© NXP B.V. 2011. All rights reserved.
b4
b4
b3
b3
Discarded
b2
b2
013aaa455
013aaa456
b1
b1
37 of 74
LSB
b0
LSB
b0