pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 47

• Manufacturer Part Number: pcf8536
• Description: Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8536
Product data sheet
9.2.1 Bit transfer
9.2.2 START and STOP conditions
9.2.3 System configuration
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal (see
Both data and clock lines remain HIGH when the bus is not busy.
A HIGH-to-LOW change of the data line, while the clock is HIGH, is defined as the START
condition (S).
A LOW-to-HIGH change of the data line, while the clock is HIGH, is defined as the STOP
condition (P).
The START and STOP conditions are shown in
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master and the devices which are
controlled by the master are the slaves. The system configuration is shown in
Fig 32. Bit transfer
Fig 33. Definition of START and STOP conditions
Fig 34. System configuration
SCL
SDA
SDA
SCL
TRANSMITTER/
RECEIVER
MASTER
START condition
All information provided in this document is subject to legal disclaimers.
SDA
SCL
Universal LCD low multiplex driver with 6 channel PWM generator
S
Rev. 1 — 6 October 2011
RECEIVER
SLAVE
data valid
data line
stable;
TRANSMITTER/
RECEIVER
Figure
SLAVE
allowed
change
of data
Figure
32).
33.
TRANSMITTER
MASTER
STOP condition
mba607
P
PCF8536
TRANSMITTER/
© NXP B.V. 2011. All rights reserved.
RECEIVER
MASTER
mbc622
Figure
mga807
SDA
SCL
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34.