ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 137
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ez80f92
Manufacturer Part Number
ez80f92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F92.pdf
(261 pages)
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Serial Peripheral Interface
PS015313-0508
Note:
The Serial Peripheral Interface (SPI) is a synchronous interface allowing several SPI-type
devices to be interconnected. The SPI is a full-duplex, synchronous, character-oriented
communication channel that employs a four-wire interface. The SPI block consists of a
transmitter, receiver, baud rate generator, and control unit. During an SPI transfer, data is
sent and received simultaneously by both the master and the slave SPI devices.
In a serial peripheral interface, separate signals are required for data and clock. The SPI
may be configured as either a master or a slave. The connection of two SPI devices (one
master and one slave) and the direction of data transfer is displayed in
Figure 30
DATAIN
When using the SPI module in the master mode, Port B2 must not be used as
GPIO. If you do attempt to use it as GPIO, even though it is assigned as a stan-
dard Mode 1 output pin, outputting a logic low on the pin will cause the SPI to
trigger a Mode Fault.
on page 131.
SS
MISO
Bit 0
Baud Rate
Generator
8-Bit Shift Register
MASTER
Figure 29.SPI Master Device
Bit 7
SCK
DATAOUT
CLKOUT
Product Specification
Serial Peripheral Interface
eZ80F92/eZ80F93
Figure 29
and
130
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