ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 173
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ez80f92
Manufacturer Part Number
ez80f92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F92.pdf
(261 pages)
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PS015313-0508
ZDA
ZCL
ZDI Write Operations
ZDI Address
lsb of
can be repeated. Repeated Read or Write operations can occur without requiring a resend
of the ZDI command. To initiate a new ZDI command, a START signal must follow.
Figure 41
ZDI Single-Byte Write
For single-byte Write operations, the address and Write control bit are first written to the
ZDI block. Following the single-bit byte separator, the data is shifted into the ZDI block
on the next eight rising edges of ZCL. The master terminates activity after 8 clock
cycles.Figure 42
A0
ZDA
ZCL
7
Write
START
8
Signal
Byte Separator
S
displays the timing for address Writes to ZDI registers.
Single-Bit
Figure 42.ZDI Single-Byte Data Write Timing
0/1
9
displays the timing for ZDI single-byte Write operations.
msb
A6
of DATA
1
msb
D7
1
A5
Figure 41.ZDI Address Write Timing
2
D6
2
A4
3
D5
3
ZDI Address Byte
A3
ZDI Data Byte
D4
4
4
A2
D3
5
5
D2
A1
6
6
D1
A0
7
lsb
7
Product Specification
0 = WRITE
1 = READ
of DATA
eZ80F92/eZ80F93
D0
R/W
lsb
8
Zilog Debug Interface
8
Byte Separator
START Signal
START Signal
End of Data
or New ZDI
or new ZDI
Single-Bit
0/1
1
9
9
166
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