ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 245
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ez80f92
Manufacturer Part Number
ez80f92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F92.pdf
(261 pages)
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Table 152. GPIO Port Output Timing
PS015313-0508
READ on Data Bus
General Purpose I/O Port Input Sample Timing
GPIO Input
Input Value
GPIO Data
Data Latch
GPIO Pin
System
Figure 64
is sampled on the rising edge of the system clock. The port value is then available to the
CPU on the second rising clock edge following the change of the port value.
Parameter
T
Clock
1
displays timing of the GPIO input sampling. The input value on a GPIO port pin
Abbreviation
Clock Rise to Port Output Delay
Figure 64.Port Input Sample Timing
T
CLK
Data Register
Port Value
Changes to 0
Into GPIO
0 Latched
Product Specification
GPIO Data Register
Value 0 Read
by eZ80
Min
Electrical Characteristics
2.0
Delay (ns)
Max
15.0
237
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