isp1564 NXP Semiconductors, isp1564 Datasheet - Page 32

• Manufacturer Part Number: isp1564
• Description: Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
10. Power management
ISP1564_1
Product data sheet
10.1 PCI bus power states
9.3 Information loading from EEPROM
9.4 EEPROM programming
The slave address that the ISP1564 uses to access the EEPROM is 101 0000b. Page
mode addressing is not supported. Therefore, pins A0, A1 and A2 of the EEPROM must
be connected to ground (logic 0).
Figure 7
default values of device ID, vendor ID, subsystem VID and subsystem DID assigned to
NXP Semiconductors by PCI-SIG will be loaded. For default values, see
To simplify the manufacturing of products based on the ISP1564, which requires changing
of subsystem DID and VID, information can be written in-circuit to the EEPROM through
the PCI bus. Reading and writing of the EEPROM is achieved by the mechanism
described in Appendix I of PCI Local Bus Specification Rev. 2.2 .
Remark: The VPD data structure described in Appendix I of PCI Local Bus Specification
Rev. 2.2 is not adopted and only the read write mechanism is adopted in the ISP1564.
The PCI bus can be characterized by one of the four power management states: B0, B1,
B2 and B3.
B0 state (PCI clock = 33 MHz, PCI bus power = on) — This corresponds to the bus
being fully operational.
Fig 7. Information loading from EEPROM
address
L = LOW; H = HIGH.
shows the content of the EEPROM memory. If the EEPROM is not present, the
7
5
6
0
1
2
3
4
Rev. 01 — 4 December 2006
subsystem vendor ID (L)
subsystem vendor ID (H)
subsystem device ID (L) - OHCI
subsystem device ID (H) - OHCI
subsystem device ID (L) - EHCI
subsystem device ID (H) - EHCI
reserved - FFh
signature
15h - loads subsystem vendor ID, device ID
1Ah - loads default values defined by NXP Semiconductors
HS USB PCI Host Controller
© NXP B.V. 2006. All rights reserved.
ISP1564
Table
004aaa930
3.
32 of 99