isp1564 NXP Semiconductors, isp1564 Datasheet - Page 95

• Manufacturer Part Number: isp1564
• Description: Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 55. HcInterruptStatus - Host Controller
Table 56. HcInterruptStatus - Host Controller
Table 57. HcInterruptEnable - Host Controller
Table 58. HcInterruptEnable - Host Controller
Table 59. HcInterruptDisable - Host Controller
Table 60. HcInterruptDisable - Host Controller
Table 61. HcHCCA - Host Controller Communication
Table 62. HcHCCA - Host Controller Communication
Table 63. HcPeriodCurrentED - Host Controller
Table 64. HcPeriodCurrentED - Host Controller
Table 65. HcControlHeadED - Host Controller Control
Table 66. HcControlHeadED - Host Controller Control
Table 67. HcControlCurrentED - Host Controller
Table 68. HcControlCurrentED - Host Controller
Table 69. HcBulkHeadED - Host Controller Bulk Head
Table 70. HcBulkHeadED - Host Controller Bulk Head
Table 71. HcBulkCurrentED - Host Controller Bulk
Table 72. HcBulkCurrentED - Host Controller Bulk
Table 73. HcDoneHead - Host Controller Done Head
Table 74. HcDoneHead - Host Controller Done Head
Table 75. HcFmInterval - Host Controller Frame
ISP1564_1
Product data sheet
Command Status register bit description . . . . .39
Interrupt Status register bit allocation . . . . . . .40
Interrupt Status register bit description . . . . . .41
Interrupt Enable register bit allocation . . . . . . .42
Interrupt Enable register bit description . . . . . .42
Interrupt Disable register bit allocation . . . . . .43
Interrupt Disable register bit description . . . . .44
Area register bit allocation . . . . . . . . . . . . . . . .45
Area register bit description . . . . . . . . . . . . . . .45
Period Current Endpoint Descriptor
register bit allocation . . . . . . . . . . . . . . . . . . . .45
Period Current Endpoint Descriptor register
bit description . . . . . . . . . . . . . . . . . . . . . . . . .46
Head Endpoint Descriptor register bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Head Endpoint Descriptor register bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Control Current Endpoint Descriptor register
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Control Current Endpoint Descriptor register
bit description . . . . . . . . . . . . . . . . . . . . . . . . .47
Endpoint Descriptor register bit allocation . . . .47
Endpoint Descriptor register bit description . . .48
Current Endpoint Descriptor register bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Current Endpoint Descriptor register bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
register bit allocation . . . . . . . . . . . . . . . . . . . .49
register bit description . . . . . . . . . . . . . . . . . . .50
Interval register bit allocation . . . . . . . . . . . . . .50
Rev. 01 — 4 December 2006
Table 76. HcFmInterval - Host Controller Frame
Table 77. HcFmRemaining - Host Controller Frame
Table 78. HcFmRemaining - Host Controller Frame
Table 79. HcFmNumber - Host Controller Frame
Table 80. HcFmNumber - Host Controller Frame
Table 81. HcPeriodicStart - Host Controller Periodic
Table 82. HcPeriodicStart - Host Controller Periodic
Table 83. HcLSThreshold - Host Controller
Table 84. HcLSThreshold - Host Controller
Table 85. HcRhDescriptorA - Host Controller
Table 86. HcRhDescriptorA - Host Controller Root
Table 87. HcRhDescriptorB - Host Controller Root
Table 88. HcRhDescriptorB - Host Controller Root
Table 89. HcRhStatus - Host Controller Root Hub
Table 90. HcRhStatus - Host Controller Root Hub
Table 91. HcRhPortStatus[2:1] - Host Controller Root
Table 92. HcRhPortStatus[2:1] - Host Controller Root
Table 93. CAPLENGTH/HCIVERSION - Capability
Table 94. CAPLENGTH/HCIVERSION - Capability
Table 95. HCSPARAMS - Host Controller Structural
Table 96. HCSPARAMS - Host Controller Structural
Table 97. HCCPARAMS - Host Controller Capability
Table 98. HCCPARAMS - Host Controller Capability
Table 99. USBCMD - USB Command register bit
Table 100.USBCMD - USB Command register bit
Interval register bit description . . . . . . . . . . . . 51
Remaining register bit allocation . . . . . . . . . . . 51
Remaining register bit description . . . . . . . . . . 52
Number register bit allocation . . . . . . . . . . . . . 52
Number register bit description . . . . . . . . . . . . 52
Start register bit allocation . . . . . . . . . . . . . . . 53
Start register bit description . . . . . . . . . . . . . . 53
Low-Speed Threshold register bit allocation . . 53
Low-Speed Threshold register bit description . 54
Root Hub Descriptor A register bit allocation . 54
Hub Descriptor A register bit description . . . . . 55
Hub Descriptor B register bit allocation . . . . . . 56
Hub Descriptor B register bit description . . . . . 56
Status register bit allocation . . . . . . . . . . . . . . 56
Status register bit description . . . . . . . . . . . . . 57
Hub Port Status[2:1] register bit allocation . . . 58
Hub Port Status[2:1] register bit description . . 59
Length/Host Controller Interface Version
Number register bit allocation . . . . . . . . . . . . . 61
Length/Host Controller Interface Version
Number register bit description . . . . . . . . . . . . 62
Parameters register bit allocation . . . . . . . . . . 62
Parameters register bit description . . . . . . . . . 63
Parameters register bit allocation . . . . . . . . . . 63
Parameters register bit description . . . . . . . . . 64
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
HS USB PCI Host Controller
© NXP B.V. 2006. All rights reserved.
ISP1564
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