aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 111

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aduc7030

Manufacturer Part Number
aduc7030
Description
Integrated Precision Battery Sensor For Automotive
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
High Voltage Configuration0 Register:
Name:
Address:
Default Value:
Access:
Function:
Table 68. HVCFG0 Bit Designations
Bit
7
6
5
4
3
2
1-0
Description
Wake/STI Thermal Shutdown Disable:
This bit is set to 1 to disable the automatic shutdown of the Wake/STI driver when a thermal event occurs.
This bit is cleared to 0 to enable the automatic shutdown of the Wake/STI driver when a thermal event occurs.
Precision Oscillator Enable Bit
This bit is set to 1 to enable the Precision, 131kHz oscillator. The oscillator start-up time is typically 70µsecs (including HV
interface latency of 10µsecs)
This bit is cleared to 0 to power down the Precision, 131kHz oscillator
BSD Mode Enable Bit
This bit is cleared to 0 to enable an internal (LIN) pull-up resistor on the LIN/BSD pin
This bit is set to 1 to disable the internal (LIN) pull-up and configure the LIN/BSD pin for BSD operation
WU Assert Bit
This bit is set to 1 to assert the external WU pin high.
This bit is cleared to 0 to pull the external WU pin low via an internal 10K: pull-down resistor.
PSM Enable Bit
This bit is cleared to 0 to disable the Power Supply (Voltage at the VDD pin) Monitor
This bit is set to 1 to enable the Power Supply (Voltage at the VDD pin) Monitor. If IRQ3 (IRQEN[16] is enabled the PSM will
generate an interrupt if the voltage at the VDD pin drops below 6.0V.
Low Voltage Flag Enable Bit
This bit is cleared to 0 to disable the Low Voltage Flag function
This bit is set to 1 to enable the Low Voltage Flag function. The Low Voltage Flag can be interrogated via HVMON[3] after power
up to determine if the REG_DVDD voltage previously dropped below 2.1V
LIN Operating Mode
These bits enable/disable the LIN driver.
0
0
1
1
HVCFG0
Indirectly addressed via the HVCON high voltage interface
0x00
Read/Write
This 8-bit register controls the function of high voltage circuits on the ADuC7030/ADuC7033. This register is not an
MMR and does not appear in the MMR memory map. It is accessed via the HVCON registered interface. Data to be
written to this register is loaded via the HVDAT MMR and data is read back from this register via the HVDAT MMR.
0
1
0
1
LIN Disabled
Reserved – (not LIN V2.0 compliant)
LIN Enabled
LIN enabled, fast mode (>20kBd) - not LIN compliant
Rev. PrE | Page 111 of 150
ADuC7030/ADuC7033

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