aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 2

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

ADuC7030/ADuC7033
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Specifications..................................................................................... 6
Terminology .................................................................................... 17
Absolute Maximum Ratings.......................................................... 18
Pin Configuration and Function Descriptions........................... 19
Theory of Operation ...................................................................... 22
Electrical Specifications............................................................... 6
Timing Specifications ................................................................ 12
ESD Caution................................................................................ 18
Overview of the ARM7TDMI core.......................................... 22
Memory Organisation ............................................................... 24
ADuC7030/ADuC7033 Reset................................................... 26
Flash/EE Memory and the ADuC7030/ADuC7033 .............. 27
SPI Timing Specifications ..................................................... 12
LIN Timing Specifications .................................................... 16
Thumb Mode (T) ................................................................... 22
Multiplier (M)......................................................................... 22
EmbeddedICE (I) ................................................................... 22
ARM7 Exceptions .................................................................. 23
ARM Registers ........................................................................ 23
Interrupt Latency.................................................................... 23
Memory Format ..................................................................... 24
SRAM....................................................................................... 24
Remap ...................................................................................... 24
Remap Operation ................................................................... 25
SYSMAP0 Register:................................................................ 25
RSTSTA Register: ................................................................... 26
RSTCLR Register:................................................................... 26
(1) Serial Downloading (In-Circuit Programming).......... 27
(2) JTAG access....................................................................... 27
Rev. PrE | Page 2 of 150
ADuC7030 Flash/EE Control Interface .................................. 27
ADuC7030 Flash/EE memory security................................... 31
ADuC7033 Flash/EE Control Interface .................................. 32
ADuC7033 Flash/EE Memory Security .................................. 36
Flash/EE Memory Reliability.................................................... 38
CODE Execution time from SRAM and Flash/EE ................ 39
ADuC7030/ADuC7033 Kernel ................................................ 40
Memory Mapped Registers ....................................................... 42
16-Bit 6' Analog to Digital Converters ............................... 48
ADuC7030 Flash/EE Memory ............................................. 27
ADuC7033 Flash/EE Memory ............................................. 27
FEE0CON Register: ............................................................... 28
Command Sequence for Executing a Mass Erase.............. 29
FEE0STA Register: ................................................................. 29
FEE0MOD Register: .............................................................. 30
FEE0ADR Registers: .............................................................. 30
FEE0DAT Registers................................................................ 30
Flash/EE Memory Protection Registers: ............................. 31
Sequence to Write the Key and Set Permanent Protection
FEE0CON and FEE1CON Registers: .................................. 33
Command Sequence for executing a Mass Erase .............. 34
FEE0STA and FEE1STA Registers: ...................................... 34
FEE0ADR and FEE1ADR Registers: ................................... 35
FEE0DAT and FEE1DAT Registers: .................................... 35
FEE0MOD and FEE1MOD Registers: ................................ 35
Block0, Flash/EE Memory Protection Registers: ............... 36
Block1, Flash/EE Memory Protection Registers: ............... 37
Sequence to Write the Key and Set Permanent Protection:
Execution from SRAM .......................................................... 39
Execution from Flash/EE ...................................................... 39
Current Channel ADC (I-ADC).......................................... 48
.................................................................................................. 32
.................................................................................................. 38
Preliminary Technical Data