aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 64

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

ADuC7030/ADuC7033
Voltage Channel Gain Calibration Register:
Name:
Address:
Default Value:
Access:
Function:
Temperature Channel Gain Calibration Register:
Name:
Address:
Default Value:
Access:
Function:
Current Channel ADC Result Counter Limit Register:
Name:
Address:
Default Value:
Access:
Function:
Current Channel ADC Result Count Register:
Name:
Address:
Default Value:
Access:
Function:
ADC1GN
0xFFFF0540
Part Specific, factory programmed
Read/Write
This Gain MMR holds a 16-bit gain calibration coefficient for scaling a voltage channel conversion result. The register
is configured at power-on with a factory default value. However, this register will be automatically overwritten if a gain
calibration of the voltage channel is initiated by the user via bits in the ADCMDE MMR. User code can only write to
this calibration register if the ADC is in idle mode. An ADC must be enabled and in idle mode before written to any
Offset or Gain Register. The ADC must be in idle mode for at least 23µs.
ADC2GN
0xFFFF0544
Part Specific, factory programmed
Read/Write
This Gain MMR holds a 16-bit gain calibration coefficient for scaling a temperature channel conversion result. The
register is configured at power-on with a factory default value. However, this register is automatically overwritten if a
gain calibration of the temperature channel is initiated by the user via bits in the ADCMDE MMR. User code can only
write to this calibration register if the ADC is in idle mode. An ADC must be enabled and in idle mode before written
to any Offset or Gain Register. The ADC must be in idle mode for at least 23µs.
ADC0RCL
0xFFFF0548
0x0001
Read/Write
This 16-bit MMR sets the number of conversions required before an ADC interrupt is generated. By default this
register is set to 0x01. The ADC counter function must be enabled via the ADC Result Counter Enable bit in the
ADCCFG MMR.
ADC0RCV
0xFFFF054C
0x0000
Read Only
This 16-bit, Read Only MMR holds the current number of I-ADC conversion results. It is used in conjunction with
ADC0RCL to mask I-ADC interrupts, generating a lower interrupt rate. Once ADC0RCV=ADC0RCL, the value is
ADC0RCV resets to 0 and recommences counting. It can also be used in conjunction with the Accumulator
(ADC0ACC) to allow an average current calculation to be undertaken. The result counter is enabled via ADCCFG[0].
This MMR is also reset to 0 when the I-ADC is reconfigured i.e. when the ADC0CON or ADCMDE are written.
Rev. PrE | Page 64 of 150
Preliminary Technical Data