aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 25

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
By default, after a reset, the Flash/EE memory is logically
mapped to address 0x00000000.
It is possible to logically REMAP the SRAM to address
0x00000000. This is done by a setting bit zero of the SYSMAP0
MMR, which is located at 0xFFFF0220. To revert Flash/EE to
0x00000000, bit zero of SYSMAP0 is cleared.
It may be desirable to remap RAM to 0x00000000 to optimize
the interrupt latency of the ADuC7030/ADuC7033, as code
may be run in full 32-bit ARM mode and at the maximum core
speed. It should be noted that when an exception occurs, the
core will default to ARM mode.
Remap Operation
When a reset occurs on the ADuC7030/ADuC7033, execution
starts automatically in the factory programmed internal
SYSMAP0 Register:
Name:
Address:
Default Value:
Access:
Function:
Table 10. SYSMAP0 MMR Bit Designations
Bit
7 to 1
0
Description
Reserved
These bits are reserved and should be written as 0 by user code
Remap Bit.
Set by the user to remap the SRAM to 0x00000000.
Cleared automatically after reset to remap the Flash/EE memory to 0x00000000.
SYSMAP0
0xFFFF0220
Updated by the kernel
Read/Write Access
This 8-bit register allows user code to remap either RAM or Flash/EE space into the bottom of the ARM memory
space starting at location 0x00000000.
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configuration code. This so called kernel is hidden and cannot
be accessed by user code. If the ADuC7030/ADuC7033 is in
normal mode, it will execute the power-on configuration
routine of the kernel and then jump to the reset vector address,
0x00000000, to execute the users reset exception routine. Since
the Flash/EE is mirrored at the bottom of the memory array at
reset, the reset routine must always be written in Flash/EE.
The REMAP command must be executed from the absolute
Flash/EE address, and not from the mirrored, remapped
segment of memory, as this may be replaced by SRAM. If a
remap operation is executed whilst operating code from the
mirrored location, Prefetch/Data aborts may occur or the user
may observe abnormal program operation.
Any kind of reset will logically remap the Flash/EE memory to
the bottom of the memory array.
ADuC7030/ADuC7033