aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 143

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
BSD COMMUNICATIONS FRAME
To transfer data between a Master and Slave, or visa versa,
requires the construction of a BSD frame. A BSD frame
contains seven key components, Pause/Synch, Direction bit, the
Slave Address, the Register Address, data, Parity bits one and
two and the Acknowledge from the slave.
If the Master is transmitting data, then all bits, except the ACK,
are transmitted by the Master.
If the Master is requesting data from the slave, the Master
transmits the Pause/Synch, the direction bit, slave address,
register address and P1 bits. The Slave then transmits the Data
bytes, Parity bit 2 and the Ack.
PAUSE: >= 3 Synchronization Pulses
DIR: Signifies the direction of data transfer
Zero if master sends request
One if slave sends request
Slave Address
Register Address: Defines register to be read or written
Bit 3 is set to write, cleared to read
Data: 8-bit read only receive register
P1 and P2
P1 = "0" if even number of "1" in 8 previous bits
P1 = "1" if odd number of "1" in 8 previous bits
P2 = "0" if even number of "1" in DATA word
P2 = "1" if odd number of "1" in DATA word
ACK: Zero if transmission is successful.
The ACK is always transmitted by the slave to indicate if the
information was received or transmitted.
Table 90. BSD Protocol Description
Pause
3 Bits
DIR
1 Bit
Slave
Address
3 Bits
Register
Address
4 Bits
P1
1 Bit
Data
8 Bit
P2
1 Bit
Rev. PrE | Page 143 of 150
ACK
1 Bit
BSD Example Pulse Widths
An example of the different Pulse widths is shown in Figure 49.
For each bit the period for which the bus is held low defines
what type of bit it is. If the bit is a SYNCH bit, the pulse is held
low for 1 bit. If the bit is a ZERO bit, the pulse is held low for 3
bits. If the bit is a ONE bit, the pulse is held low for 6 bits.
If the Master is transmitting data, the signal is held low for the
duration of the signal by the Master. An example of a Master
transmitting zero is shown in Figure 50. If the Slave is
transmitting data, the Master pulls the bus low to begin
communications. The slave must then pull the bus low before
T
elapsed, after which the bus is released by the Slave. An example
of a Slave transmitting a zero is shown in Figure 51.
Typical BSD Program Flow
As BSD is a PWM communications protocol controlled by
software, it is necessary for the user to construct the required
data from each bit. For example the slave address. The slave
node receives the three bits and constructs the relevant address.
When BSD communication is initiated by the master, data is
transmitted and received by the slave node. A flow diagram
showing this process is shown in Figure 52.
SYNC
elapses and hold the bus low until either T
BUS PULLED LOW
BY MASTER
BUS PULLED LOW
BY MASTER
T
T
SYNC
ZERO
T
1
T
T
T
T
Figure 50. BSD Master Transmitting Zero
SYNC
ZERO
SYNC
ZERO
Figure 51. BSD Slave Transmitting Zero
Figure 49. BSD Bit transmission
ADuC7030/ADuC7033
BUS HELD LOW
BY SLAVE
RELEASED BY
MASTER
BUS RELEASED BY
MASTER AFTER T
BUS RELEASED BY
SLAVE AFTER T
ZERO
ZERO
ZERO
or T
ONE
has