atmega323l ATMEL Corporation, atmega323l Datasheet - Page 102

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atmega323l

Manufacturer Part Number
atmega323l
Description
Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
Two-wire Serial
Interface (Byte
Oriented)
102
ATmega323(L)
The Two-wire Serial Interface supports bi-directional serial communication. It is
designed primarily for simple but efficient integrated circuit (IC) control. The system is
comprised of two lines, SCL (Serial Clock) and SDA (Serial Data) that carry information
between the ICs connected to them. Various communication configurations can be
designed using this bus. Figure 52 shows a typical Two-wire Serial Bus configuration.
Any device connected to the bus can be Master or Slave. Note that all AVR devices con-
nected to the bus must be powered to allow any bus operation.
Figure 52. Two-wire Serial Bus Configuration
The Two-wire Serial Interface supports Master/Slave and Transmitter/Receiver opera-
tion at up to 400 kHz bus clock rate. The Two-wire Serial Interface has hardware
support for 7-bit addressing. When the Two-wire Serial Interface is enabled (TWEN in
TWCR is set), a glitch filter is enabled for the input signals from the pins PC0 (SCL) and
PC1 (SDA), and the output from these pins is slew-rate controlled. The Two-wire Serial
Interface is byte oriented. The operation of the Two-wire Serial Bus is shown as a pulse
diagram in Figure 53, including the START and STOP conditions and generation of ACK
signal by the bus Receiver.
Figure 53. Two-wire Serial Bus Timing Diagram
The block diagram of the Two-wire Serial Interface is shown in Figure 54.
SDA
SCL
CONDITION
Device 1
START
MSB
1
2
Device 2
7
R/W
BIT
8
Device 3
ACK
9
FROM RECEIVER
ACKNOWLEDGE
.......
1
2
Device n
8
ACK
9
R1
R2
REPEATED START CONDIT
STOP CONDITION
1457G–AVR–09/03
V
SCL
SDA
CC

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