atmega323l ATMEL Corporation, atmega323l Datasheet - Page 141
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atmega323l
Manufacturer Part Number
atmega323l
Description
Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA323L.pdf
(247 pages)
- Current page: 141 of 247
- Download datasheet (4Mb)
ATmega323(L)
• SS – Port B, Bit 4
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured
as an input regardless of the setting of DDB4. As a Slave, the SPI is activated when this
pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is
controlled by DDB4. When the pin is forced to be an input, the pull-up can still be con-
trolled by the PORTB4 bit. See the description of the SPI port for further details.
• AIN1/OC0 – Port B, Bit 3
AIN1, Analog Comparator Negative Input. When configured as an input (DDB3 is
cleared (zero)) and with the internal MOS pull up resistor switched off (PB3 is cleared
(zero)), this pin also serves as the negative input of the On-chip Analog Comparator.
During Power-down mode, the Schmitt Trigger of the digital input is disconnected. This
allows analog signals which are close to V
/2 to be present during Power-down without
CC
causing excessive power consumption.
OC0, Output Compare Match output: The PB3 pin can serve as an external output for
the Timer/Counter0 Compare Match. The PB3 pin has to be configured as an output
(DDB3 set (one)) to serve this function. See “8-bit Timers/Counters Timer/Counter0 and
Timer/Counter2” on page 45 for further details, and how to enable the output. The OC0
pin is also the output pin for the PWM mode timer function.
• AIN0/INT2 – Port B, Bit 2
AIN0, Analog Comparator Positive Input. When configured as an input (DDB2 is cleared
(zero)) and with the internal MOS pull up resistor switched off (PB2 is cleared (zero)),
this pin also serves as the positive input of the On-chip Analog Comparator. During
Power-down mode, the Schmitt Trigger of the digital input is disconnected if INT2 is not
enabled. This allows analog signals which are close to V
/2 to be present during
CC
Power-down without causing excessive power consumption.
INT2, External Interrupt Source 2: The PB2 pin can serve as an external interrupt
source to the MCU. See “MCU Control and Status Register – MCUCSR” on page 30 for
further details.
• T1 – Port B, Bit 1
T1, Timer/Counter1 Counter Source. See the timer description for further details.
• T0/XCK – Port B, Bit 0
T0, Timer/Counter0 Counter Source. See the timer description for further details.
XCK, USART external clock. See the USART description for further details.
141
1457G–AVR–09/03
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