atmega323l ATMEL Corporation, atmega323l Datasheet - Page 35

• Manufacturer Part Number: atmega323l
• Description: Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
• Manufacturer: ATMEL Corporation

1457G–AVR–09/03
• Bit 6 – TOIE2: Timer/Counter2 Overflow Interrupt Enable
When the TOIE2 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter2 Overflow interrupt is enabled. The corresponding interrupt is executed if
an overflow in Timer/Counter2 occurs, i.e., when the TOV2 bit is set in the
Timer/Counter Interrupt Flag Register
• Bit 5 – TICIE1: Timer/Counter1 Input Capture Interrupt Enable
When the TICIE1 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Input Capture Event Interrupt is enabled. The corresponding interrupt is
executed if a capture triggering event occurs on PD6 (ICP), i.e., when the ICF1 bit is set
in the Timer/Counter Interrupt Flag Register
• Bit 4 – OCIE1A: Timer/Counter1 Output Compare A Match Interrupt Enable
When the OCIE1A bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Compare A Match interrupt is enabled. The corresponding interrupt is
executed if a Compare A Match in Timer/Counter1 occurs, i.e., when the OCF1A bit is
set in the Timer/Counter Interrupt Flag Register
• Bit 3 – OCIE1B: Timer/Counter1 Output Compare B Match Interrupt Enable
When the OCIE1B bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Compare B Match interrupt is enabled. The corresponding interrupt is
executed if a Compare B Match in Timer/Counter1 occurs, i.e., when the OCF1B bit is
set in the Timer/Counter Interrupt Flag Register
• Bit 2 – TOIE1: Timer/Counter1 Overflow Interrupt Enable
When the TOIE1 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Overflow interrupt is enabled. The corresponding interrupt is executed if
an overflow in Timer/Counter1 occurs, i.e., when the TOV1 bit is set in the
Timer/Counter Interrupt Flag Register
• Bit 1 – OCIE0: Timer/Counter0 Output Compare Match Interrupt Enable
When the OCIE0 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match interrupt is enabled. The corresponding interrupt is
executed if a Compare0 Match in Timer/Counter0 occurs, i.e., when the OCF0 bit is set
in the Timer/Counter Interrupt Flag Register
• Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if
an overflow in Timer/Counter0 occurs, i.e. when the TOV0 bit is set in the Timer/Counter
Interrupt Flag Register
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TIFR.
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TIFR.
TIFR.
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TIFR.
TIFR.
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TIFR.
TIFR.
ATmega323(L)
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