atmega323l ATMEL Corporation, atmega323l Datasheet - Page 55

• Manufacturer Part Number: atmega323l
• Description: Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
• Manufacturer: ATMEL Corporation

ATmega323(L)
Register B – TCCR1B” on page 57. The different Status Flags (Overflow, Compare
Match, and Capture Event) are found in the Timer/Counter Interrupt Flag Register –
TIFR. Control signals are found in the Timer/Counter1 Control Registers – TCCR1A and
TCCR1B. The interrupt enable/disable settings for Timer/Counter1 are found in the
Timer/Counter Interrupt Mask Register – TIMSK.
When Timer/Counter1 is externally clocked, the external signal is synchronized with the
Oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 16-bit Timer/Counter1 features both a high-resolution and a high-accuracy usage
with the lower prescaling opportunities. Similarly, the high-prescaling opportunities
makes the Timer/Counter1 useful for lower speed functions or exact timing functions
with infrequent actions.
The Timer/Counter1 supports two Output Compare functions using the Output Compare
Register 1 A and B (OCR1A and OCR1B) as the data sources to be compared to the
Timer/Counter1 contents. The Output Compare functions include optional clearing of
the counter on compareA match, and actions on the Output Compare Pins on both com-
pare matches.
Timer/Counter1 can also be used as an 8-, 9-, or 10-bit Pulse Width Modulator. In this
mode the counter and the OCR1A/OCR1B Registers serve as a dual glitch-free stand-
alone PWM with centered pulses. Alternatively, the Timer/Counter1 can be configured
to operate at twice the speed in PWM mode, but without centered pulses. Refer to page
60 for a detailed description of this function.
The Input Capture function of Timer/Counter1 provides a capture of the Timer/Counter1
contents to the Input Capture Register – ICR1, triggered by an external event on the
Input Capture Pin – ICP. The actual capture event settings are defined by the
Timer/Counter1 Control Register – TCCR1B. In addition, the Analog Comparator can be
set to trigger the Input Capture. Refer to the section, “The Analog Comparator”, for
details on this. The ICP pin logic is shown in Figure 37.
Figure 37. ICP Pin Schematic Diagram
If the noise canceler function is enabled, the actual trigger condition for the capture
event is monitored over four samples, and all four must be equal to activate the Capture
Flag.
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1457G–AVR–09/03