mt90226ag ETC-unknow, mt90226ag Datasheet - Page 25

• Manufacturer Part Number: mt90226ag
• Description: 16/8 Port Tc Phy Device
• Manufacturer: ETC-unknow

Data Sheet
2.2.1
The internal TX Cell RAM can hold up to 119 cells. A one cell space for predefined Idle Cell is reserved for
MT90225/226 operation.
The remaining 118 cells can be assigned to any of the 16/8 TX Link UTOPIA FIFOs. The MT90225/226 implements
one TX Link UTOPIA FIFO for each link. Each TX Link UTOPIA FIFO is associated with one TX UTOPIA PHY
Address. Please refer to section 5.0 "UTOPIA Interface Operation" for more details.
ATM cells received from the ATM port are placed in a TX LINK UTOPIA FIFO, waiting to be transmitted. If the
Idle/Unassigned cell removal option is selected, these cells are dropped. If the TX LINK UTOPIA FIFO is empty, an
Idle cell is sent to the output link.
TX Link FIFO Length Definition Register (0x008B - 0x0092) are used to set the size of the TX Link UTOPIA
FIFO. A maximum of 15 cells can be assigned to any single FIFO. The size of unused TX Link UTOPIA FIFOs
should be set to zero.
2.3
ATM cell octet byte alignment conforms to ITU G.804 recommendations for T1 or E1 framer parallel to serial format
conversion.
The TDM TX Link Control Register (0x0600-0x060F) and TDM RX Link Control Register (0x0700-0x070F)
registers are used to select the serial mode of operation. Additionally, the serial links can operate at rates up to
2.5Mb/s individually, or up to 5.0Mb/s when paired or 10Mb/s when grouped in fours. Refer to Description of the
TDM interface in Section 4.0 for more details.
TX Cell RAM and TX Link FIFO Length
Parallel to Serial TDM Interface
Zarlink Semiconductor Inc.
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