mt90226ag ETC-unknow, mt90226ag Datasheet - Page 53

• Manufacturer Part Number: mt90226ag
• Description: 16/8 Port Tc Phy Device
• Manufacturer: ETC-unknow

Data Sheet
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
15:8
7:0
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
0
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Reserved. Write 1 for normal operation.
Reserved. Write 0 for normal operation.
A value of 1 enables the descrambling of the cell for the link N+8.
When set to 1, count all USER cells for link N+8, when cleared to 0, count
Idle/Unassigned cells for link N+8.
A value of 1 means that the Unassigned and Idle cells are discarded upon reception for
the link N+8.
A value of 1 enables the discard option of the cells with wrong HEC. A value of 0 will
disables the discard option, all the cells will be written to the receive buffer.
A value of 1signifies that the ATM Forum polynomial value (coset) is not to be added to
the HEC before the verification. A value of 0 means that the HEC is calculated and
compared (i.e. including the coset).
A value of 1 enables the correction of the cells with a wrong HEC. A value of 0 disable the
correction of the HEC.
Reserved. Write 1 for normal operation.
Reserved. Write 0 for normal operation.
A value of 1 enables the descrambling of the cell for the link N.
When set to 1, count all USER cells for link N, when cleared to 0, count Idle/Unassigned
cells for link N.
A value of 1 means that the Unassigned and Idle cells are discarded upon reception for
the link N.
A value of 1 enables the discard option of the cells with wrong HEC. A value of 0 will
disables the discard option, all the cells will be written to the receive buffer.
A value of 1signifies that the ATM Forum polynomial value (coset) is not to be added to
the HEC before the verification. A value of 0 means that the HEC as per ATM Forum is
calculated and compared (i.e. including the coset).
A value of 1 enables the correction of the cells with a wrong HEC. A value of 0 disable the
correction of the HEC.
Unused. Read all 0’s.
Contains the number of consecutive cell periods that the CD circuit will count before the
incoming ATM cell stream to be considered in LCD state. Each count will be done on a
cell by cell basis. The value of this register is multiplied by 2 before being loaded in the
internal counter. (The internal counter value can be from 2 to 510).
Note that a value of 0 is not allowed as an LCD condition would be generated.
0x00C8 (1 reg)
000C
1 register per 2 links. Link 0 is paired with link 8, link 1 with link 9 and so on.
0C0C
0x00C0 - 0x00C7 (8 reg)
1 reg. for all 16 cell delineation state machines
Table 14 - Loss of Delineation Register
Table 13 - RX Link Control Registers
Zarlink Semiconductor Inc.
Description
Description
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