FW82801E Intel, FW82801E Datasheet - Page 35

• Manufacturer Part Number: FW82801E
• Description: Communications I/O Controller Hub
• Manufacturer: Intel

Advance Information Datasheet
Table 6.
82801E C-ICH Signal Description (Sheet 11 of 11)
VRMPWRGD
UART_CLK
V_CPU_IO
USBP0P
USBP0N
USBP1P
USBP1N
VccRTC
Vcc1_8
Vcc3_3
TRDY#
V5REF
VBIAS
Signal
Vss
Type
I/O
I/O
I
I
Target Ready: TRDY# indicates the 82801E C-ICH’s ability as a Target to
complete the current data phase of the transaction. TRDY# is used in
conjunction with IRDY#. A data phase is completed when both TRDY# and
IRDY# are sampled asserted. During a read, TRDY# indicates that the
82801E C-ICH, as a Target, has placed valid data on AD[31:0]. During a write,
TRDY# indicates the 82801E C-ICH, as a Target is prepared to latch data.
TRDY# is an input to the 82801E C-ICH when the 82801E C-ICH is the
Initiator and an output from the 82801E C-ICH when the 82801E C-ICH is a
Target. TRDY# is tri-stated from the leading edge of PCIRST#. TRDY#
remains tri-stated by the 82801E C-ICH until driven by a target.
Input clock to the SIU. This clock is passed to the baud clock generation logic
of each UART in the SIU.
Universal Serial Bus Port 1:0 Differential: These differential pairs are used
to transmit Data/Address/Command signals for ports 0 and 1.
Powered by the same supply as the processor I/O voltage. This supply is
used to drive the processor interface outputs.
Reference for 5 V tolerance on Core well inputs.
RTC well bias voltage. The DC reference voltage applied to this pin sets a
current that is mirrored throughout the oscillator and buffer circuitry. See
“External RTC Circuitry” on page 50.
1.8 V supply for Core well logic.
3.3 V supply for Core well I/O buffers.
3.3 V (can drop to 2.0 V minimum in the G3 state) supply for the RTC well.
This power is not expected to be shut off unless the RTC battery is removed
or completely drained.
NOTE: Implementations should not attempt to clear CMOS by using a
VRM Power Good: This can be considered to be the CPU’s VRM power
good. This signal should be ANDed with the ATX power supply’s PWROK
signal.
Grounds.
jumper to pull VccRTC low. Clearing CMOS in an 82801E
C-ICH-based platform can be done by using a jumper on RTCRST#
or GPI, or using SAFEMODE strap.
Description
Intel
®
82801E C-ICH
35