FW82801E Intel, FW82801E Datasheet - Page 37

• Manufacturer Part Number: FW82801E
• Description: Communications I/O Controller Hub
• Manufacturer: Intel

3.2.4
3.2.5
Advance Information Datasheet
Table 10. Firmware Hub Interface Signals
Table 11. PCI Interface Signals (Sheet 1 of 3)
Firmware Hub Interface
PCI Interface
C/BE[3:0]#
/LFRAME#
DEVSEL#
FWH[3:0]
/LAD[3:0]
AD[31:0]
FWH[4]
Name
Name
Type
Type
I/O
I/O
I/O
I/O
I/O
Firmware Hub Signals: These signals are muxed with LPC address signals.
Firmware Hub Signals: This signal is muxed with the LPC LFRAME# signal.
PCI Address/Data: AD[31:0] is a multiplexed address and data bus. During the first
clock of a transaction, AD[31:0] contain a physical address (32 bits). During
subsequent clocks, AD[31:0] contain data. The 82801E C-ICH drives all 0s on
AD[31:0] during the address phase of all PCI Special Cycles.
Bus Command and Byte Enables: The command and byte enable signals are
multiplexed on the same PCI pins. During the address phase of a transaction,
C/BE[3:0]# define the bus command. During the data phase, C/BE[3:0]# define the
Byte Enables.
All command encodings not shown are reserved. The 82801E C-ICH does not
decode reserved values, and therefore will not respond if a PCI master generates a
cycle using one of the reserved values.
As a target, the 82801E C-ICH can support DAC mode addressing for 44 bits.
Device Select: The 82801E C-ICH asserts DEVSEL# to claim a PCI transaction.
As an output, the 82801E C-ICH asserts DEVSEL# when a PCI master peripheral
attempts an access to an internal 82801E C-ICH address or an address destined
for the hub interface (main memory or AGP). As an input, DEVSEL# indicates the
response to an 82801E C-ICH-initiated transaction on the PCI bus. DEVSEL# is
tri-stated from the leading edge of PCIRST#. DEVSEL# remains tri-stated by the
82801E C-ICH until driven by a target device.
C/BE[3:0]#
0000
0001
0010
0011
0110
0111
1010
1011
1100
1101
1110
1111
Command Type
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Memory Read
Memory Write
Configuration Read
Configuration Write
Memory Read Multiple
DAC Mode Address to be latched (target only)
Memory Read Line
Memory Write and Invalidate
Description
Description
Intel
®
82801E C-ICH
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