MT46V128M8 MICRON [Micron Technology], MT46V128M8 Datasheet - Page 42

• Manufacturer Part Number: MT46V128M8
• Description: DOUBLE DATA RATE (DDR) SDRAM
• Manufacturer: MICRON [Micron Technology]

09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
5. The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP commands must be
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle, and bursts are not in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
10.READs or WRITEs listed in the Command/Action column include Reads or Writes with auto precharge enabled and READs or
11.Requires appropriate DM masking.
12.A WRITE command may be applied after the completion of the READ burst; otherwise, a BURST TERMINATE must be used to
Write w/Auto-
Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled and ends when
t
applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
met, the DDR SDRAM will be in the all banks idle state.
Accessing Mode
Register: Starts with registration of a LOAD MODE REGISTER command and ends when
Once
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when
met, all banks will be in the idle state.
WRITEs with auto precharge disabled.
end the READ burst prior to asserting a WRITE command.
RP has been met. Once
t
MRD is met, the DDR SDRAM will be in the all banks idle state.
t
RP is met, the bank will be in the idle state.
42
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RFC is met. Once
t
MRD has been met.
t
RP is met. Once
1Gb: x4, x8, x16
DDR SDRAM
PRELIMINARY
t
RFC is
©2003 Micron Technology. Inc.
t
RP is