MT46V128M8 MICRON [Micron Technology], MT46V128M8 Datasheet - Page 47

• Manufacturer Part Number: MT46V128M8
• Description: DOUBLE DATA RATE (DDR) SDRAM
• Manufacturer: MICRON [Micron Technology]

Table 11: Clock Input Operating Conditions
0°C £ T
Notes: 1–5, 15, 16, 30; notes appear on page 54-57
NOTE:
09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
1.
2. CK and CK# must cross in this region.
3. CK and CK# must meet at least V
4. CK and CK# must have a minimum 700mv peak to peak swing.
5. CK or CK# may not be more positive than V
6. For AC operation, all DC clock requirements must also be satisfied.
7. Numbers in diagram reflect nominal values.
PARAMETER/CONDITION
Clock Input Mid-Point Voltage; CK and CK#
Clock Input Voltage Level; CK and CK#
Clock Input Differential Voltage; CK and CK#
Clock Input Differential Voltage; CK and CK#
Clock Input Crossing Point Voltage; CK and CK#
- 0.30V
2.80V
1.45V
1.25V
1.05V
This provides a minimum of 1.15V to a maximum of 1.35V, and is always half of V
CK#
CK
A
£ +70°C; V
X
DD
Q = +2.5V ±0.2V, V
ID
(DC) min when static and is centered around V
Figure 32: SSTL_2 Clock Input
DD
= +2.5V ±0.2V
DD
Q+ 0.3V or more negative than Vss - 0.3V.
SYMBOL
V
V
V
V
V
MP
IN
ID
ID
IX
(
(
(
(
(
AC
DC
DC
AC
DC
)
)
)
)
)
47
X
0.5 x V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
1.15
0.36
-0.3
0.7
DD
Q - 0.2 0.5 x V
MP
DD
Q.
(DC)
V
V
V
DD
DD
DD
MAX
1.35
Q + 0.3
Q + 0.6
Q + 0.6
DD
V
Maximum Clock Level
Minimum Clock Level
MP
1Gb: x4, x8, x16
Q + 0.2
(DC)
1
DDR SDRAM
V
IX
UNITS
(AC)
PRELIMINARY
V
V
V
V
V
©2003 Micron Technology. Inc.
2
V
ID
5
5
(DC)
NOTES
V
6, 9
6, 8
ID
3
6
8
9
(AC)
4