MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 14
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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Features
General Description
MC68HC912DT128A Rev 2.0
14
•
•
•
•
•
16-bit CPU12
– Upward compatible with M68HC11 instruction set
– Interrupt stacking and programmer’s model identical to
– 20-bit ALU
– Instruction queue
– Enhanced indexed addressing
Multiplexed bus
– Single chip or expanded
– 16 address/16 data wide or 16 address/8 data narrow modes
Memory
– 128K byte flash EEPROM, made of four 32K byte modules
– 2K byte EEPROM
– 8K byte RAM with Vstby, made of two 4K byte modules.
Two Analog-to-digital converters
– 2 times 8-channels, 10-bit resolution
Three 1M bit per second, CAN 2.0 A, B software compatible
modules on the MC68HC912DT128A (two on the
MC68HC912DG128A)
– Two receive and three transmit buffers per CAN
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– Loop-back for self test operation
M68HC11
with 8K bytes protected BOOT section in each module
8 x 8 bit
per CAN
General Description
MOTOROLA
2--gen
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