MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 185
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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PORTP — Port P Data Register
DDRP — Port P Data Direction Register
15-pwm
MOTOROLA
RESET:
RESET:
PWM
DDP7
Bit 7
PP7
Bit 7
–
–
0
DDP6
PP6
6
–
–
6
0
PORTP can be read anytime.
PWM functions share port P pins 3 to 0 and take precedence over the
general-purpose port when enabled.
When configured as input, a read will return the pin level. For port bits 7
to 4 it will read zero because there are no available external pins.
When configured as output, a read will return the latched output data.
For port bits 7 to 4 it will read the last value written. A write will drive
associated pins only if configured for output and the corresponding PWM
channel is not enabled.
After reset, all pins are general-purpose, high-impedance inputs.
DDRP determines pin direction of port P when used for general-purpose
I/O.
DDRP[7:4] — This bits served as memory locations since there are no
corresponding port pins.
DDRP[3:0] — Data Direction Port P pin 0-3
0 = I/O pin configured as high impedance input
1 = I/O pin configured for output.
DDP5
PP5
5
–
–
5
0
Pulse-Width Modulator
DDP4
PP4
4
–
–
4
0
PWM3
DDP3
PP3
3
–
3
0
PWM2
DDP2
PP2
2
0
2
–
PWM1
DDP1
PP1
MC68HC912DT128A Rev 2.0
1
0
1
–
PWM Register Descriptions
Pulse-Width Modulator
PWM0
DDP0
Bit 0
Bit 0
PP0
0
–
$0056
$0057
185
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