MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 394
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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Glossary
instructions — Operations that a CPU can perform. Instructions are expressed by programmers
interrupt — A temporary break in the sequential execution of a program to respond to signals
interrupt request — A signal from a peripheral to the CPU intended to cause the CPU to
I/O — See “input/output (I/0).”
jitter — Short-term signal instability.
latch — A circuit that retains the voltage level (logic 1 or logic 0) written to it for as long as power
latency — The time lag between instruction completion and data movement.
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage (V
logic 0 — A voltage level approximately equal to the ground voltage (V
low byte — The least significant eight bits of a word.
M68HC12 — A Motorola family of 16-bit MCUs.
mark/space — The logic 1/logic 0 convention used in formatting data in serial communication.
mask — 1. A logic circuit that forces a bit or group of bits to a desired state. 2. A photomask used
MCU — Microcontroller unit. See “microcontroller.”
memory location — Each M68HC12 memory location holds one byte of data and has a unique
memory map — A pictorial representation of all memory locations in a computer system.
MC68HC912DT128A Rev 1.0
394
as assembly language mnemonics. A CPU interprets an opcode and its associated
operand(s) and instruction.
from peripheral devices by executing a subroutine.
execute a subroutine.
is applied to the circuit.
in integrated circuit fabrication to transfer an image onto silicon.
address. To store information in a memory location, the CPU places the address of the
location on the address bus, the data information on the data bus, and asserts the write
signal. To read information from a memory location, the CPU places the address of the
location on the address bus and asserts the read signal. In response to the read signal,
the selected memory location places its data onto the data bus.
Glossary
SS
).
DD
).
MOTOROLA
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