MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 323
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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ATD0TESTL/ATD1TESTL — ATD Test Register
ATD0TESTH/ATD1TESTH — ATD Test Register
13-atd
MOTOROLA
RESET:
RESET:
SAR1
SAR9
Bit 7
Bit 7
0
0
SAR0
SAR8
6
0
6
0
SAR[9:0] — SAR Data
RST — Module Reset Bit
register read is not a pre-qualifier for the clearing mechanism when
AFFC = 1). Otherwise the status register must be read to clear the
flag.
The test registers control various special modes which are used
during manufacturing. The test register can be read or written only in
the special modes. In the normal modes, reads of the test register
return zero and writes have no effect.
Reads of this byte return the current value in the SAR. Writes to this
byte change the SAR to the value written. Bits SAR[9:0] reflect the ten
SAR bits used during the resolution process for a 10-bit result.
When set, this bit causes all registers and activity in the module to
assume the same state as out of power-on reset (except for ADPU bit
in ATDCTL2, which remains set, allowing the ATD module to remain
enabled).
SAR7
RST
5
0
5
0
Analog-To-Digital Converter (ATD)
SAR6
4
0
4
0
0
SAR5
3
0
3
0
0
SAR4
2
0
2
0
0
Analog-To-Digital Converter (ATD)
SAR3
MC68HC912DT128A Rev 2.0
1
0
1
0
0
SAR2
Bit 0
Bit 0
0
0
0
ATD Registers
$0069/$01E9
$0068/$01E8
323
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