MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 389
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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A — See “accumulators (A and B or D).”
accumulators (A and B or D) — Two 8-bit (A and B) or one 16-bit (D) general-purpose registers
acquisition mode — A mode of PLL operation with large loop bandwidth. Also see ’tracking
address bus — The set of wires that the CPU or DMA uses to read and write memory locations.
addressing mode — The way that the CPU determines the operand address for an instruction.
ALU — See “arithmetic logic unit (ALU).”
analogue-to-digital converter (ATD) — The ATD module is an 8-channel, multiplexed-input
arithmetic logic unit (ALU) — The portion of the CPU that contains the logic circuitry to perform
asynchronous — Refers to logic circuits and operations that are not synchronized by a common
ATD — See “analogue-to-digital converter”.
MOTOROLA
in the CPU. The CPU uses the accumulators to hold operands and results of arithmetic
and logic operations.
mode’.
The M68HC12 CPU has 15 addressing modes.
successive-approximation analog-to-digital converter.
arithmetic, logic, and manipulation operations on operands.
reference signal.
Glossary
MC68HC912DT128A Rev 1.0
Glossary
Glossary
389
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