MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 143
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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9-clock
MOTOROLA
CAUTION:
NOTE:
frequency comes back, software should clear the BCSP bit while running
in limp-home mode.
The two shaded regions A and B in
away due to incorrect clocks on SYSCLK if the MCU is clocked by
EXTALi and the PLL is not used.
In region A, there is a delay between the loss of clock and its detection
by the clock monitor. When the EXTALi clock signal is disturbed, the
clock generation circuitry may receive an out of spec signal and drive the
CPU with irregular clocks. This may lead to code runaway.
In region B, as the 13-stage counter is free running, the count of 4096
may be reached when the amplitude of the EXTALi clock has not
stabilized. In this case, an improper EXTALi is sent to the clock
generation circuitry when limp-home mode is exited. This may also
cause code runaway.
If the MCU is clocked by the PLL, the risk of code runaway is very
low, but it can still occur under certain conditions due to irregular
clocks from the clock source appearing on the SYSCLK.
The COP watch dog should always be enabled in order to reset the MCU
in case of a code runaway situation.
It is always advisable to take additional precautions within the
application software to trap such situations.
Clock Functions
Limp-Home and Fast STOP Recovery modes
Figure 15
present a of code run
MC68HC912DT128A Rev 2.0
Clock Functions
143
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