NAND02GW3B2CN1F STMICROELECTRONICS [STMicroelectronics], NAND02GW3B2CN1F Datasheet - Page 36

• Manufacturer Part Number: NAND02GW3B2CN1F
• Description: 1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Software algorithms
8
8.1
8.2
36/62
Software algorithms
This section gives information on the software algorithms that ST recommends to implement
to manage the Bad Blocks and extend the lifetime of the NAND device.
NAND Flash memories are programmed and erased by Fowler-Nordheim tunneling using a
high voltage. Exposing the device to a high voltage for extended periods can cause the
oxide layer to be damaged. For this reason, the number of program and erase cycles is
limited (see
Wear-Leveling Algorithm and an Error Correction Code, to extend the number of program
and erase cycles and increase the data retention.
To help integrate a NAND memory into an application ST Microelectronics can provide a File
System OS Native reference software, which supports the basic commands of file
management.
Contact the nearest ST Microelectronics sales office for more details.
Bad Block Management
Devices with Bad Blocks have the same quality level and the same AC and DC
characteristics as devices where all the blocks are valid. A Bad Block does not affect the
performance of valid blocks because it is isolated from the bit line and common source line
by a select transistor.
The devices are supplied with all the locations inside valid blocks erased (FFh). The Bad
Block Information is written prior to shipping. Any block, where the 1st and 6th Bytes, or 1st
Word, in the spare area of the 1st page, does not contain FFh, is a Bad Block.
The Bad Block Information must be read before any erase is attempted as the Bad Block
Information may be erased. For the system to be able to recognize the Bad Blocks based on
the original information it is recommended to create a Bad Block table following the
flowchart shown in
NAND Flash memory failure modes
Over the lifetime of the device additional Bad Blocks may develop.
To implement a highly reliable system, all the possible failure modes must be considered:
Refer to
Program/Erase failure: in this case the block has to be replaced by copying the data
to a valid block. These additional Bad Blocks can be identified as attempts to program
or erase them will give errors in the Status Register.
As the failure of a Page Program operation does not affect the data in other pages in
the same block, the block can be replaced by re-programming the current data and
copying the rest of the replaced block to an available valid block. The Copy Back
Program command can be used to copy the data to a valid block. See
Copy Back Program
Read failure: in this case, ECC correction must be implemented. To efficiently use the
memory space, it is recommended to recover single-bit error in read by ECC, without
replacing the whole block.
Table 17
Table 18
for the procedure to follow if an error occurs during an operation.
Figure
for value) and it is recommended to implement Garbage Collection, a
for more details.
15.
NAND01G-B2B, NAND02G-B2C
Section 6.4: