NAND02GW3B2CN1F STMICROELECTRONICS [STMicroelectronics], NAND02GW3B2CN1F Datasheet - Page 56
![no-image](/images/no-image-200.jpg)
NAND02GW3B2CN1F
Manufacturer Part Number
NAND02GW3B2CN1F
Description
1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.NAND02GW3B2CN1F.pdf
(62 pages)
- Current page: 56 of 62
- Download datasheet (712Kb)
DC And AC parameters
Figure 33. Resistor value versus waveform timings for Ready/Busy signal
1. T = 25°C.
11.2
56/62
400
300
200
100
0
1
30
1.7
1.7
Data Protection
The ST NAND device is designed to guarantee Data Protection during Power Transitions.
A V
In the V
low (V
figure.
Figure 34. Data Protection
DD
V DD = 1.8V, C L = 30pF
IL
detection circuit disables all NAND operations, if V
DD
) to guarantee hardware protection during power transitions as shown in the below
2
1.7
0.85
60
V DD
W
range from V
R P (K
Nominal Range
3
0.57
1.7
90
LKO
V LKO
Locked
t f
to the lower limit of nominal range, the WP pin should be kept
4
0.43
1.7
120
2
1
3
4
t r
400
300
200
100
0
1
100
3.6
2.4
Locked
ibusy
V DD = 3.3V, C L = 100pF
2
DD
NAND01G-B2B, NAND02G-B2C
200
3.6
1.2
is below the V
R P (K
3
300
3.6
0.8
Ai11086
LKO
threshold.
400
4
3.6
2
1
3
4
0.6
ai07565B
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