HYB18L128160BC-7.5 QIMONDA [Qimonda AG], HYB18L128160BC-7.5 Datasheet - Page 10

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HYB18L128160BC-7.5

Manufacturer Part Number
HYB18L128160BC-7.5
Description
DRAMs for Mobile Applications 128-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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2.2.1.1
READ and WRITE accesses to the Mobile-RAM are burst oriented, with the burst length being programmable. The
burst length determines the maximum number of column locations that can be accessed for a given READ or
WRITE command. Burst lengths of 1, 2, 4, 8 locations are available for both the sequential and interleaved burst
types, and a full-page burst mode is available for the sequential burst type.
When a READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected.
All accesses for that burst take place within this block, meaning that the burst wraps within the block if a boundary
is reached. The block is uniquely selected by A1-A8 when the burst length is set to two, by A2-A8 when the burst
length is set to four and by A3-A8 when the burst length is set to eight. The remaining (least significant) address
bit(s) is (are) used to select the starting location within the block.
Full page bursts wrap within the page if the boundary is reached. Please note that full page bursts do not self-
terminate; this implies that full-page read or write bursts with Auto Precharge are not legal commands.
Table 6
NotesNotes
1. For a burst length of 2, A1-Ai select the two-data-element block; A0 selects the first access within the block.
2. For a burst length of 4, A2-Ai select the four-data-element block; A0-A1 select the first access within the block.
3. For a burst length of 8, A3-Ai select the eight-data-element block; A0-A2 select the first access within the block.
4. For a full page burst, A0-Ai select the starting data element.
Data Sheet
Field Bits
BL
Burst Length
2
4
8
Full Page
[2:0]
Burst Length
Burst Definition
Type Description
w
n
A2
0
0
0
0
1
1
1
1
Starting Column Address
Burst Length
000
001
010
011
111
Note: All other bit combinations are RESERVED.
B
B
B
B
B
n
A1
0
0
1
1
0
0
1
1
0
0
1
1
1
2
4
8
full page (Sequential burst type only)
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
n
Sequential
0 - 1
1 - 0
0 - 1 - 2 - 3
1 - 2 - 3 - 0
2 - 3 - 0 - 1
3 - 0 - 1 - 2
0 - 1 - 2 - 3 - 4 - 5 - 6 - 7
1 - 2 - 3 - 4 - 5 - 6 - 7 - 0
2 - 3 - 4 - 5 - 6 - 7 - 0 - 1
3 - 4 - 5 - 6 - 7 - 0 - 1 - 2
4 - 5 - 6 - 7 - 0 - 1 - 2 - 3
5 - 6 - 7 - 0 - 1 - 2 - 3 - 4
6 - 7 - 0 - 1 - 2 - 3 - 4 - 5
7 - 0 - 1 - 2 - 3 - 4 - 5 - 6
Cn, Cn+1, Cn+2, …
10
Order of Accesses Within a Burst
Functional DescriptionRegister Definition
HY[B/E]18L128160B[C/F]-7.5
Interleaved
0 - 1
1 - 0
0 - 1 - 2 - 3
1 - 0 - 3 - 2
2 - 3 - 0 - 1
3 - 2 - 1 - 0
0 - 1 - 2 - 3 - 4 - 5 - 6 - 7
1 - 0 - 3 - 2 - 5 - 4 - 7 - 6
2 - 3 - 0 - 1 - 6 - 7 - 4 - 5
3 - 2 - 1 - 0 - 7 - 6 - 5 - 4
4 - 5 - 6 - 7 - 0 - 1 - 2 - 3
5 - 4 - 7 - 6 - 1 - 0 - 3 - 2
6 - 7 - 4 - 5 - 2 - 3 - 0 - 1
7 - 6 - 5 - 4 - 3 - 2 - 1 - 0
not supported
128-Mbit Mobile-RAM
05282004-NZNK-8T0D
Rev. 1.71, 2007-01

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