HYB18L128160BC-7.5 QIMONDA [Qimonda AG], HYB18L128160BC-7.5 Datasheet - Page 17

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HYB18L128160BC-7.5

Manufacturer Part Number
HYB18L128160BC-7.5
Description
DRAMs for Mobile Applications 128-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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2.4.4
Figure 9
Before any READ or WRITE commands can be issued to a bank within the Mobile-RAM, a row in that bank must
be “opened” (activated). This is accomplished via the ACTIVE command and addresses A0 - A11, BA0 and BA1
(see
an ACTIVE command), a READ or WRITE command may be issued to that row, subject to the t
A subsequent ACTIVE command to a different row in the same bank can only be issued after the previous active
row has been “closed” (precharged).
The minimum time interval between successive ACTIVE commands to the same bank is defined by t
subsequent ACTIVE command to another bank can be issued while the first bank is being accessed, which results
in a reduction of total row-access overhead. The minimum time interval between successive ACTIVE commands
to different banks is defined by t
Figure 10
Data Sheet
Figure
9), which decode and select both the bank and the row to be activated. After opening a row (issuing
ACTIVE
ACTIVE Command
Bank Activate Timings
RRD
.
17
Functional DescriptionCommands
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
05282004-NZNK-8T0D
Rev. 1.71, 2007-01
RCD
specification.
RC
. A

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